LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 207

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

Output Drivers
To facilitate higher performance data transfer, the use of balanced CMOS active drivers for critical signals (Data,
HostAck, HostClk, PeriphAck, PeriphClk) are used in ECP Mode. Because the use of active drivers can present
compatibility problems in Compatible Mode (the control signals, by tradition, are specified as open-drain), the drivers
are dynamically changed from open-drain to push-pull. The timing for the dynamic driver change is specified in then
IEEE
from Microsoft. The dynamic driver change must be implemented properly to prevent glitching the outputs.
Note 1 : The data is held until BUSY goes inactive or for time t3, whichever is longer. This only applies if another
data transfer is pending. If no other data transfer is pending, the data is held indefinitely.
SMSC DS – LPC47M192
1284 Extended Capabilities Port Protocol and ISA Interface Standard, Rev. 1.14, July 14, 1993, available
nSTROBE
NAME
PD<7:0>
t1
t2
t3
t4
t5
t6
BUSY
PDATA Valid to nSTROBE Active
nSTROBE Active Pulse Width
PDATA Hold from nSTROBE Inactive (Note 1)
nSTROBE Active to BUSY Active
BUSY Inactive to nSTROBE Active
BUSY Inactive to PDATA Invalid (Note 1)
FIGURE 28 - PARALLEL PORT FIFO TIMING
DESCRIPTION
DATASHEET
t1
Page 207
t4
t2
MIN
600
600
450
680
80
t3
TYP
t6
MAX
t5
500
UNITS
ns
ns
ns
ns
ns
ns
Rev. 03/30/05