LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 35

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LPC47M192-NW

Manufacturer Part Number
LPC47M192-NW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47M192-NW

Lead Free Status / RoHS Status
Compliant

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BIT 6 MOTOR ENABLE 2
The MTR2 disk interface output is not supported in the LPC47M192.
BIT 7 MOTOR ENABLE 3
The MTR3 disk interface output is not supported in the LPC47M192.
TAPE DRIVE REGISTER (TDR)
Address 3F3 READ/WRITE
The Tape Drive Register (TDR) is included for 82077 software compatibility and allows the user to assign tape
support to a particular drive during initialization. Any future references to that drive automatically invokes tape
support. The TDR Tape Select bits TDR.[1:0] determine the tape drive number. Table 5 illustrates the Tape Select Bit
encoding. Note that drive 0 is the boot device and cannot be assigned tape support. The remaining Tape Drive
Register bits TDR.[7:2] are tristated when read. The TDR is unaffected by a software reset.
Normal Floppy Mode
Normal mode.Register 3F3 contains only bits 0 and 1. When this register is read, bits 2 – 7 are ‘0’.
Enhanced Floppy Mode 2 (OS2)
Register 3F3 for Enhanced Floppy Mode 2 operation.
Note:
SMSC DS – LPC47M192
REG 3F3
REG 3F3 Reserved Reserved
L0-CRF2-Bx = Logical Device 0, Configuration Register F2, Bit x.
Bit 5
X
1
0
DIGITAL OUTPUT
DB7
DB7
DIGITAL OUTPUT REGISTER
0
Bit 4
REGISTER
X
1
0
Bit 1
Table 4 – Internal 2 Drive Decode – Drives 0 and 1 Swapped
0
0
1
1
Bit1
DB6
DB6
X
0
0
0
TAPE SEL1
(TDR.1)
Bit 0
0
1
X
0
0
1
1
DB5
DB5
Bit 0
Drive Type ID
0
0
1
0
1
DRIVE SELECT OUTPUTS
DATASHEET
Table 5 – Tape Select Bits
Table 6 – Drive Type ID
nDS1
0
1
1
(ACTIVE LOW)
TAPE SEL0
DB4
DB4
(TDR.0)
Page 35
0
0
1
0
1
L0-CRF2 – B1
L0-CRF2 – B3
L0-CRF2 – B5
L0-CRF2 – B7
REGISTER 3F3 – DRIVE TYPE ID
nDS0
Bit 5
Floppy Boot Drive
1
0
1
DB3
DB3
0
SELECTED
DRIVE
None
1
2
3
MOTOR ON OUTPUTS
nMTR1
DB2
DB2
nBIT 4
nBIT 4
nBIT 4
0
(ACTIVE LOW)
L0-CRF2 – B0
L0-CRF2 – B2
L0-CRF2 – B4
L0-CRF2 – B6
Bit 4
tape sel1
tape sel1
DB1
DB1
nMTR0
nBIT 5
nBIT 5
nBIT 5
tape sel0
tape sel0
DB0
DB0
Rev. 03/30/05

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