LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 31

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

7.4 Floppy Disk Controller
7.4.1 FDC INTERNAL REGISTERS
(Shown with base addresses of 3F0 and 370)
STATUS REGISTER A (SRA)
Address 3F0 READ ONLY
This register is read-only and monitors the state of the internal interrupt signal and several disk interface pins in
PS/2 and Model 30 modes. The SRA can be accessed at any time when in PS/2 mode. In the PC/AT mode the data
bus pins D0 – D7 are held in a high impedance state for a read of address 3F0.
PS/2 Mode
BIT 0 DIRECTION
Active high status indicating the direction of head movement. A logic “1” indicates inward direction; a logic “0”
indicates outward direction.
BIT 1 nWRITE PROTECT
Active low status of the WRITE PROTECT disk interface input. A logic “0” indicates that the disk is write protected.
BIT 2 nINDEX
Active low status of the INDEX disk interface input.
BIT 3 HEAD SELECT
Active high status of the HDSEL disk interface input. A logic “1” selects side 1 and a logic “0” selects side 0.
SMSC DS – LPC47M192
RESET
COND.
The Floppy Disk controller (FDC) provides the interface between a host microprocessor and the floppy disk
drives.
Precompensation and Data Rate Selection logic for an IBM XT/AT compatible FDC. The true CMOS 765B
core guarantees 100% IBM PC XT/AT compatibility in addition to providing data overflow and underflow
protection.
subsection).
The FDC is compatible to the 82077AA using SMSC’s proprietary floppy disk controller core.
The Floppy Disk Controller contains eight internal registers which facilitate the interfacing between the host
microprocessor and the disk drive. Table 2 shows the addresses required to access these registers. Registers
other than the ones shown are not supported. The rest of the description assumes that the primary addresses
have been selected.
The FDC integrates the functions of the Formatter/Controller, Digital data Separator, Write
PENDIN
ADDRESS
PRIMARY
INT
LPC47M192 supports two floppy drive directly (see “Direct Support for Two Floppy Drives”
G
7
0
3F0
3F1
3F2
3F3
3F4
3F4
3F5
3F6
3F7
3F7
nDRV2
6
1
Table 2 – Status, Data and Control Registers
SECONDARY
ADDRESS
370
371
372
373
374
374
375
376
377
377
STEP
DATASHEET
5
0
R/W
R/W
R/W
R/W
nTRK0
Page 31
W
W
R
R
R
R
N/A
4
Status Register A (SRA)
Status Register B (SRB)
Digital Output Register (DOR)
Tape Drive Register (TDR)
Main Status Register (MSR)
Data Rate Select Register (DSR)
Data (FIFO)
Reserved
Digital Input Register (DIR)
Configuration Control Register (CCR)
HDSEL
3
0
REGISTER
nINDX
N/A
2
nWP
N/A
1
DIR
Rev. 03/30/05
0
0