LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 209
LPC47M192-NW
Manufacturer Part Number
LPC47M192-NW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LPC47M192-NW.pdf
(228 pages)
Specifications of LPC47M192-NW
Lead Free Status / RoHS Status
Compliant
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Note 1: Maximum value only applies if there is room in the FIFO and terminal count has not been received. ECP
Note 2: nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
SMSC DS – LPC47M192
NAME
can stall by keeping nALF low.
t1
t2
t3
t4
t5
t6
PD<7:0>
nACK
nALF
PDATA Valid to nACK Asserted
nALF Deasserted to PDATA Changed
nACK Asserted to nALF Deasserted
(Notes 1,2)
nACK Deasserted to nALF Asserted (Note 2)
nALF Asserted to nACK Asserted
nALF Deasserted to nACK Deasserted
FIGURE 30 - ECP PARALLEL PORT REVERSE TIMING
DESCRIPTION
t4
DATASHEET
t1
t5
Page 209
t3
t6
MIN
80
80
t4
0
0
0
0
TYP
t2
MAX
200
200
UNITS
ns
ns
ns
ns
ns
ns
Rev. 03/30/05
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