LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 23

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

6
6.1 VCC/HVCC Power
6.1.1 3 VOLT OPERATION / 5 VOLT TOLERANCE
The LPC interface pins are 3.3 V only. These signals meet PCI DC specifications for 3.3V signaling. These pins are:
The input voltage for all other pins is 5.5V max. These pins include all non-LPC Bus pins and the following pins in the
Super I/O Block:
The Hardware Monitoring Block digital pins are 3.3V only.
6.2 VREF Pin
6.3 VTR Support
6.3.1 TRICKLE POWER FUNCTIONALITY
SMSC DS – LPC47M192
LAD[3:0]
LFRAME#
LDRQ#
LPCPD#
PCI_CLK
SER_IRQ
IO_PME#
UART 1 Ring Indicator
UART 2 Ring Indicator
Keyboard data
Mouse data
“Wake on Specific Key” Logic
PCI_RESET#
POWER FUNCTIONALITY
The LPC47M192 has four power planes: VCC, HVCC, VREF, and VTR.
The LPC47M192 is a 3.3 Volt part. The VCC/HVCC supply is 3.3 Volts (nominal). VCC is supply for Super I/O
Block, and HVCC is supply for the Hardware Monitoring Block. See the “Operational Description” Section and
the “Maximum Current Values” subsection.
The LPC47M192 is a 3.3-Volt part. It is intended solely for 3.3V applications. Non-LPC bus pins are 5V
tolerant; that is, the operating input voltage is 5.5V Max, and the I/O buffer output pads are backdrive
protected (they do not impose a load on any external VCC/HVCC powered circuitry). The 5V tolerant pins are
applicable to the Super I/O Block only.
The LPC47M192 has a reference voltage pin input on pin 44 of the part. This reference voltage can be
connected to either a 5V supply or a 3.3V supply. It is used for the game port. See the “GAME PORT
LOGIC” section.
The LPC47M192 requires a trickle supply (V
in the PME interface when V
Description Section. The maximum VTR current that is required depends on the functions that are used in the
part.
LPC47M192 is not intended to provide wake-up capabilities on standby current, V
V
V
Note: If V
minimum potential at least 10 µs before V
potential difference between the two supplies must not exceed 500mV.
When the LPC47M192 is running under VTR only (VCC removed), PME wakeup events are active and (if
enabled) able to assert the nIO_PME pin active low. The following lists the wakeup events:
TR
TR
powers the IR interface, the PME configuration registers, and the PME interface. The V
Power-on-Reset signal to initialize these components.
See Trickle Power Functionality subsection and Maximum Current Values subsection.
TR
is to be used for programmable wake-up events when V
CC
is removed. The VTR supply is 3.3 Volts (nominal). See the Operational
DATASHEET
cc
begins a power-on cycle. When V
TR
) to provide sleep current for the programmable wake-up events
Page 23
CC
is removed, V
TR
and V
TR
can be connected to V
cc
are fully powered, the
TR
TR
must be at its full
pin generates a
Rev. 03/30/05
If the
CC
.