LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 39

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

DIGITAL INPUT REGISTER (DIR)
Address 3F7 READ ONLY
This register is read-only in all modes.
PC-AT Mode
BIT 0 – 6 UNDEFINED
The data bus outputs D0 – 6 are read as ‘0’.
BIT 7 DSKCHG
This bit monitors the pin of the same name and reflects the opposite value seen on the disk cable or the value
programmed in the Force Disk Change Register (see Runtime Register at offset 0x1E).
PS/2 Mode
BIT 0 nHIGH DENS
This bit is low whenever the 500 Kbps or 1 Mbps data rates are selected, and high when 250 Kbps and 300 Kbps are
selected.
SMSC DS – LPC47M192
RESET
RESET
COND.
COND.
CHG
CHG
DSK
DSK
N/A
N/A
7
7
FIFO THRESHOLD
FIFO THRESHOLD
FIFO THRESHOLD
EXAMPLES
EXAMPLES
EXAMPLES
15 bytes
15 bytes
15 bytes
2 bytes
8 bytes
2 bytes
8 bytes
2 bytes
8 bytes
1 byte
1 byte
1 byte
N/A
N/A
6
0
6
1
Table 11 – FIFO Service Delay
DATASHEET
N/A
N/A
5
0
5
1
1 x 4 us - 1.5 us = 2.5 us
2 x 4 us - 1.5 us = 6.5 us
8 x 4 us - 1.5 us = 30.5 us
15 x 4 us - 1.5 us = 58.5 us
1 x 8 us - 1.5 us = 6.5 us
2 x 8 us - 1.5 us = 14.5 us
8 x 8 us - 1.5 us = 62.5 us
15 x 8 us - 1.5 us = 118.5 us
1 x 16 us - 1.5 us = 14.5 us
2 x 16 us - 1.5 us = 30.5 us
8 x 16 us - 1.5 us = 126.5 us
15 x 16 us - 1.5 us = 238.5 us
MAXIMUM DELAY TO SERVICING AT
MAXIMUM DELAY TO SERVICING AT
MAXIMUM DELAY TO SERVICING AT
Page 39
N/A
N/A
4
0
4
1
500 Kbps DATA RATE
2 Mbps DATA RATE
1 Mbps DATA RATE
N/A
N/A
3
0
3
1
DRATE
SEL1
N/A
N/A
2
0
2
DRATE
SEL0
N/A
N/A
1
0
1
nHIGH
DENS
N/A
0
0
0
1
Rev. 03/30/05