LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 168

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

SMSC DS – LPC47M192
INDEX
0x2A
0x2B
0x2C
0x2D
0x2E
0x02
0x03
0x07
0x20
0x21
0x22
0x23
0x24
0x26
0x27
0x28
0x2F
0x30
0x60
0x61
0x70
0x74
0xF0
0xF1
0xF2
0xF4
0xF5
0x30
0x60
0x61
0x70
0x74
0xF0
0xF1
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R
R
R
R
PCI RESET
LOGICAL DEVICE 3 CONFIGURATION REGISTERS (Parallel Port)
Sysopt=0:
Sysopt=1:
Sysopt=0:
Sysopt=1:
LOGICAL DEVICE 1 CONFIGURATION REGISTERS (Reserved)
LOGICAL DEVICE 2 CONFIGURATION REGISTERS (Reserved)
Table 64 – LPC47M192 Configuration Registers Summary
0x3C
0x00
0x00
0x60
0x00
0x00
0x44
0x2E
0x4E
0x00
0x00
0x00
0x03
0xF0
0x06
0x02
0x0E
0x00
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x04
0x00
LOGICAL DEVICE 0 CONFIGURATION REGISTERS (FDD)
-
-
-
-
-
-
-
-
GLOBAL CONFIGURATION REGISTERS
VCC POR
Sysopt=0:
Sysopt=1:
Sysopt=0:
Sysopt=1:
0x2E
0x4E
0xF0
0x0E
0xFF
0x00
0x00
0x3C
0x00
0x00
0x60
0x00
0x00
0x44
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x03
0x06
0x02
0x00
0x00
0x00
0x00
0x00
0x04
0x00
Current Revision
-
-
DATASHEET
VTR POR
Page 168
0x0E
0xFF
0x3C
0x00
0x00
0x60
0x00
0x00
0x44
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x03
0xF0
0x06
0x02
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x04
0x00
-
-
-
-
RESET
SOFT
0x00
0x60
0x00
0x00
0x03
0xF0
0x06
0x02
0x00
0x00
0x00
0x00
0x04
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Config Control
Reserved – reads return 0
Logical Device Number
Device ID - hard wired
Device Rev - hard wired
Power Control
Power Mgmt
OSC
Configuration Port Address Byte 0
(Low Byte)
Configuration Port Address Byte 1
(High Byte)
Reserved
TEST 6
TEST 4
TEST 5
TEST 1
TEST 2
TEST 3
Activate
Primary Base I/O Address High
Byte
Primary Base I/O Address Low
Byte
Primary Interrupt Select
DMA Channel Select
FDD Mode Register
FDD Option Register
FDD Type Register
FDD0
FDD1
Activate
Primary Base I/O Address High
Byte
Primary Base I/O Address Low
Byte
Primary Interrupt Select
DMA Channel Select
Parallel Port Mode Register
Parallel Port Mode Register 2
CONFIGURATION REGISTER
Rev. 03/30/05