LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 175

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

SMSC DS – LPC47M192
LOGICAL
NUMBER
DEVICE
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
Serial Port 1
Serial Port 2
Game Port
LOGICAL
Reserved
Reserved
Reserved
Reserved
DEVICE
Parallel
KYBD
FDC
Port
Table 67 – I/O Base Address Configuration Register Description
REGISTER
0x60,0x61
0x60,0x61
0x60,0x61
0x60,0x61
0x60,0x61
INDEX
n/a
n/a
n/a
n/a
n/a
DATASHEET
[0x0100:0x0FF8]
ON 8 BYTE
BOUNDARIES
n/a
n/a
[0x0100:0x0FFC]
ON 4 BYTE
BOUNDARIES
(EPP Not supported)
or
[0x0100:0x0FF8]
ON 8 BYTE
BOUNDARIES
(all modes supported,
EPP is only available
when the base address
is on an 8-byte
boundary)
[0x0100:0x0FF8]
ON 8 BYTE
BOUNDARIES
[0x0100:0x0FF8]
ON 8 BYTE
BOUNDARIES
n/a
Not Relocatable
Fixed Base Address:
60,64
n/a
[0x0100:0x0FFF]
on 1 byte boundaries
BASE I/O
(Note 1)
RANGE
Page 175
+0 : SRA
+1 : SRB
+2 : DOR
+3 : TDR
+4 : MSR/DSR
+5 : FIFO
+7 : DIR/CCR
n/a
n/a
+0 : Data/ecpAfifo
+1 : Status
+2 : Control
+400h : cfifo/ecpDfifo/tfifo/cnfgA
+401h : cnfgB
+402h : ecr
+3 : EPP Address
+4 : EPP Data 0
+5 : EPP Data 1
+6 : EPP Data 2
+7 : EPP Data 3
+0 : RB/TB/LSB div
+1 : IER/MSB div
+2 : IIR/FCR
+3 : LCR
+4 : MSR
+5 : LSR
+6 : MSR
+7 : SCR
+0 : RB/TB/LSB div
+1 : IER/MSB div
+2 : IIR/FCR
+3 : LCR
+4 : MSR
+5 : LSR
+6 : MSR
+7 : SCR
n/a
+0 : Data Register
+4 : Command/Status Reg.
n/a
+00: Game Port Register
BASE OFFSETS
FIXED
Rev. 03/30/05