LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 15

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

SMSC DS – LPC47M192
QFP PIN#
100
91
90
61
62
95
96
98
99
IRRX2/
IRTX2/
GP52/
GP53/
GP55/
GP56/
nDCD1
nRI1
GP34
GP35
RXD2
(IRRX)
TXD2
(IRTX)
nRTS2
nCTS2
GP57/
nDTR2
NAME
Active low Data Carrier Detect inputs for the
serial port. Handshake signal which notifies
the UART that carrier signal is detected by
the modem.
status of nDCD signal by reading bit 7 of
Modem Status Register (MSR).
signal state change from low to high after the
last MSR read will set MSR bit 3 to a 1. If bit
3 of Interrupt Enable Register is set, the
interrupt is generated when nDCD changes
state.
Note: Bit 7 of MSR is the complement of
nDCD.
Active low Ring Indicator inputs for the serial
port. Handshake signal which notifies the
UART that the telephone ring signal is
detected by the modem.
monitor the status of nRI signal by reading
bit 6 of Modem Status Register (MSR). A
nRI signal state change from low to high
after the last MSR read will set MSR bit 2 to
a 1. If bit 3 of Interrupt Enable Register is
set, the interrupt is generated when nRI
changes state.
Note: Bit 6 of MSR is the complement of
nRI.
Infrared Receive Input
/General Purpose I/O.
configured as an Open-Drain Output.
Infrared Transmit Output
/General Purpose I/O.
configured as an Open-Drain Output.
General Purpose I/O.
configured as an Open-Drain Output.
Receive Serial Data 2 Input. See RXD1 pin
description above
Infrared Receive Input
General Purpose I/O.
configured as an Open-Drain Output.
Transmit Serial Data 2 Output. See TXD1
pin description above.
Infrared Transmit Output
General Purpose I/O.
configured as an Open-Drain Output.
Request to Send 2 Output. See nRTS1 pin
description above.
General Purpose I/O.
configured as an Open-Drain Output.
Clear to Send 2 Input.
description above.
General Purpose I/O.
configured as an Open-Drain Output.
Data Terminal Ready Output. See nDTR1
pin description above.
SERIAL PORT 2 INTERFACE (8)
INFRARED INTERFACE (2)
DATASHEET
DESCRIPTION
The CPU can monitor the
Page 15
See nCTS1 pin
GPIO can be
GPIO can be
GPIO can be
GPIO can be
GPIO can be
GPIO can be
GPIO can be
The CPU can
A nDCD
I
I
IS/O8
IO12
IS/O8
IO12
IO8
IO8
IO8
BUFFER
NAME
VCC
VCC
VCC
VTR
VCC
VTR
VCC
VCC
VCC
WELL
PWR
5
7, 8, 9
5
5, 7, 8
5
5
5
NOTES
Rev. 03/30/05