LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 136

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LPC47M192-NW

Manufacturer Part Number
LPC47M192-NW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47M192-NW

Lead Free Status / RoHS Status
Compliant

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Temperature High Limit 1 or 2 register and Remote Temperature Low Limit 1 or 2 register, then the Remote Temp
Error 1 or 2 status bit is set in the Interrupt Status Register 1.
There are Remote Diode Fault status 1 and 2 bits in the Status Register 2 (0x42). The LPC47M192 automatically
sets the associated diode fault bit to 1 when there is an open circuit fault on the Remote x+ or Remote x- thermal
diode input pins. The occurrence of either a short (D+ and D- shorted together) or open circuit fault will cause 80h to
be loaded into the associated reading register, which will cause the corresponding remote temp error bit to be set.
This will cause the THERM# pin to become active if enabled. This same operation applies (including the diode
fault bit getting set) for the following board design error conditions: D+ shorted to VCC, D- shorted to VCC,
D+ shorted to ground. The diode fault bit will also be set if D- is shorted to ground, however, the part will
give a valid temperature reading (with some error), so the out of limit bit will not be set and therefore the
THERM# pin will not go active for this condition. . Before a remote diode conversion is updated, the status of the
remote diode is checked.
The temperature change is computed by measuring the change in Vbe at two different operating points of the diode
to which the Dx+ and Dx- pins are connected. But accuracy of the measurement also depends on non-ideality factor
of the process the diode is manufactured on. See “Appendix A – Thermal Diode Parameters” for relationship
between the non-ideality factor and the change in Vbe.
Note : Since digital boards can be electrically noisy environments that may interfere when measuring very small
voltages from a remote diode sensor, special layout considerations should be made. See “Layout Considerations”
below.
7.18.3.9.3
Temperature data can be read from the three temperature registers. One is the Ambient Temperature Reading
register (0x27), the second is the Remote Diode Temperature Reading 1 register (0x26), and the third is the Remote
Diode Temperature Reading 2 register (0x52).
The following table shows the corresponding format of the temperature digital data, represented by an 8-bit, two’s
complement word with an LSB equal to 1.0
7.18.3.9.4
Offset Register 1 is used for internal or remote temperature 1 reading.
complement value which is added (or subtracted if the number is negative) to the temperature reading. The default
value in the offset register is zero, so initially zero is always added to the temperature reading. This offset register is
configured for the external temperature channel by default. It may be switched to the internal channel by setting bit 4
of the Special Function Register to 1.
7.18.3.9.5
The Offset Register 2 at 1Eh is for second remote diode temperature reading.
complement value which is added (or subtracted if the number is negative) to the second external temperature
reading. Note that the default value in the offset register is zero, so initially zero is always added to the second
temperature reading. This offset register only applies to remote diode temperature reading 2. No configuration bit is
required.
7.18.3.10 Thermal / Voltage Interrupt Pin
The THERM# function is multiplexed on A0/RESET#/THERM#/XNOR_OUT pin. This function is used as an interrupt
output for out-of-limit temperature events. It can also be enabled for out-of-limit voltage events.
SMSC DS – LPC47M192
Temperature Data Format
Offset Register
Second Offset Register
Temperature
+125
+1.0
+25
-1.0
-25
-40
0
0
C
0
0
0
0
0
C
C
0
C
C
C
C
0
C.
DATASHEET
Page 136
Digital Output
The Offset Register 1 (1Fh) contain a 2's
0111 1101
0001 1001
0000 0001
0000 0000
1111 1111
1110 0111
1101 1000
This register contains a 2's
Rev. 03/30/05

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