LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 9

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

FIGURES
FIGURE 1 – LPC47M192 BLOCK DIAGRAM ............................................................................................................22
FIGURE 2 - MPU-401 MIDI INTERFACE ....................................................................................................................78
FIGURE 3 - MPU-401 INTERRUPT.............................................................................................................................81
FIGURE 4 - MIDI DATA BYTE EXAMPLE ...................................................................................................................82
FIGURE 5 - KEYBOARD LATCH...............................................................................................................................111
FIGURE 6 - MOUSE LATCH......................................................................................................................................111
FIGURE 7 - GPIO FUNCTION ILLUSTRATION ........................................................................................................116
FIGURE 8 − FAN TACHOMETER INPUT AND CLOCK SOURCE............................................................................123
FIGURE 9 − CONCEPTUAL BLOCK DIAGRAM OF FAN MONITORING LOGIC .....................................................124
FIGURE 10 − SUGGESTED MINIMUM TRACK WIDTH AND SPACING..................................................................138
FIGURE 11 − USING A DIODE AS A REMOTE TEMPERATURE SENSING ELEMENT .........................................138
FIGURE 12 - POWER-UP TIMING ............................................................................................................................198
FIGURE 13 - INPUT CLOCK TIMING........................................................................................................................198
FIGURE 14 - PCI CLOCK TIMING.............................................................................................................................199
FIGURE 15 - RESET TIMING ....................................................................................................................................199
FIGURE 16 - OUPUT TIMING MEASUREMENT CONDITIONS, LPC SIGNALS......................................................200
FIGURE 17 - INPUT TIMING MEASUREMENT CONDITIONS, LPC SIGNALS .......................................................200
FIGURE 18 - I/O WRITE ............................................................................................................................................200
FIGURE 19 - I/O READ..............................................................................................................................................201
FIGURE 20 - DMA REQUEST ASSERTION THROUGH LDRQ#..............................................................................201
FIGURE 21 - DMA WRITE (FIRST BYTE).................................................................................................................201
FIGURE 22 - DMA READ (FIRST BYTE) ..................................................................................................................201
FIGURE 23 - FLOPPY DISK DRIVE TIMING (AT MODE ONLY) ..............................................................................202
FIGURE 24 - EPP 1.9 DATA OR ADDRESS WRITE CYCLE....................................................................................203
FIGURE 25 - EPP 1.9 DATA OR ADDRESS READ CYCLE .....................................................................................204
FIGURE 26 - EPP 1.7 DATA OR ADDRESS WRITE CYCLE....................................................................................205
FIGURE 27 - EPP 1.7 DATA OR ADDRESS READ CYCLE .....................................................................................205
FIGURE 28 - PARALLEL PORT FIFO TIMING..........................................................................................................207
FIGURE 29 - ECP PARALLEL PORT FORWARD TIMING .......................................................................................208
FIGURE 30 - ECP PARALLEL PORT REVERSE TIMING ........................................................................................209
FIGURE 31 - IRDA RECEIVE TIMING.......................................................................................................................210
FIGURE 32 - IRDA TRANSMIT TIMING ....................................................................................................................211
FIGURE 33 - AMPLITUDE SHIFT KEYED IR RECEIVE TIMING..............................................................................212
FIGURE 34 - AMPLITUDE SHIFT KEYED IR TRANSMIT TIMING ...........................................................................213
FIGURE 35 - SETUP AND HOLD TIME ....................................................................................................................214
FIGURE 36 - SERIAL PORT DATA ...........................................................................................................................214
FIGURE 37 - JOYSTICK POSITION SIGNAL............................................................................................................215
FIGURE 38 - JOYSTICK BUTTON SIGNAL ..............................................................................................................215
FIGURE 39 - KEYBOARD/MOUSE RECEIVE/SEND DATA TIMING........................................................................216
FIGURE 40 - MIDI DATA BYTE .................................................................................................................................217
FIGURE 41 - FAN OUTPUT TIMING .........................................................................................................................217
FIGURE 42 - FAN TACHOMETER INTPUT TIMING.................................................................................................217
FIGURE 43 - LED OUTPUT TIMING .........................................................................................................................218
FIGURE 44 – SMBUS TIMING ..................................................................................................................................219
FIGURE 45 – 128 PIN QFP PACKAGE OUTLINE, 14x20x2.7 BODY, 3.2 MM FOOTPRINT ..................................220
FIGURE 46 - XNOR-CHAIN TEST STRUCTURE......................................................................................................223
SMSC DS – LPC47M192
Page 9
Rev. 03/30/05
DATASHEET