LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 141

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LPC47M192-NW

Manufacturer Part Number
LPC47M192-NW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LPC47M192-NW

Lead Free Status / RoHS Status
Compliant

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Note 1 : This register is read-only when GP43 register bit [3:2] = 01 and the GP43 pin is high.
Note 2 : Bits [3:2] of this register are reset (cleared) on VCC POR and PCI Reset (and VTR POR).
Note 3 : Bit 3 of this register is reset (cleared) on VCC POR and PCI Reset (and VTR POR).
Note 4 : The parallel port interrupt defaults to 1 when the parallel port activate bit is cleared.
Note 5 : Bits 2 and 3 of the PME_STS4 and SMI_STS4 registers, and bit 3 of the PME_STS5 register may
on a VCC POR. If GP32, GP33 and GP53 are configured as input, then their corresponding PME and SMI status bits
will be set on a VCC POR. These GPIOs cannot be used for PME wakeup when the part is under VTR power
(VCC=0).
SMSC DS – LPC47M192
REGISTER
OFFSET
60-7F
(hex)
5A
5B
5C
5D
5E
56
57
58
59
5F
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
PCI RESET
-
-
-
-
-
-
-
-
-
-
-
VCC POR
DATASHEET
-
-
-
-
-
-
-
-
-
-
-
VTR POR
Page 141
0x00
0x00
0x50
0x00
0x00
0x00
0x00
0x00
0x00
0x00
-
RESET
SOFT
-
-
-
-
-
-
-
-
-
-
-
FAN1
FAN2
Fan Control
Fan1 Tachometer Register
Fan2 Tachometer Register
Fan1 Preload Register
Fan2 Preload Register
LED1
LED2
Keyboard Scan Code
Reserved – reads return 0
REGISTER
Rev. 03/30/05
be
set

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