SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 239

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SAM9RL64

Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9RL64

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
ARM DDI 0029G
The following scan chain control signals can also be used for scan chain 3:
nHIGHZ
RSTCLKBS This signal is active when the TAP controller state machine is in the
In addition to these control outputs, SDINBS output and SDOUTBS input are also
provided. When an external scan chain is in use, SDOUTBS must be connected to the
serial data output of the external scan chain and SDINBS must be connected to the serial
data input of the scan chain.
Copyright © 1994-2001. All rights reserved.
This signal can be used to drive the outputs of the scan cells to the HIGH
impedance state. This signal is driven LOW when the HIGHZ instruction
is loaded into the instruction register and HIGH at all other times.
RESET-TEST LOGIC state. It can be used to reset any additional scan
cells.
Debug in Depth
B-21

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