SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 249

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SAM9RL64

Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9RL64

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
B.9.5
B.9.6
ARM DDI 0029G
System speed access
Summary of return address calculations
This code restores the PC and restarts the program from the next instruction.
When a system speed access is performed during debug state, the value of the PC
increases by three addresses. System speed instructions access the memory system and
so it is possible for aborts to take place. If an abort occurs during a system speed
memory access, the ARM7TDMI core enters abort mode before returning to debug
state.
This is similar to an aborted watchpoint, but the problem is much harder to fix because
the abort was not caused by an instruction in the main program and so the PC does not
point to the instruction that caused the abort. An abort handler usually looks at the PC
to determine the instruction that caused the abort and also the abort address. In this case,
the value of the PC is invalid, but because the debugger can determine which location
was being accessed, the debugger can be written to help the abort handler fix the
memory system.
The calculation of the branch return address is as follows:
where N is the number of debug speed instructions executed, including the final branch,
and S is the number of system speed instructions executed.
for normal breakpoint and watchpoint, the branch is:
for entry through debug request, DBGRQ, or watchpoint with exception, the
branch is:
Copyright © 1994-2001. All rights reserved.
Debug in Depth
B-31

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