SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 51

no-image

SAM9RL64

Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9RL64

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
2.3.2
ARM DDI 0029G
31
Big-Endian
Byte at address A
Halfword at address A
In big-endian format, the ARM7TDMI processor stores the most significant byte of a
word at the lowest-numbered byte, and the least significant byte at the
highest-numbered byte. So the byte at address 0 of the memory system connects to data
lines 31 through 24.
For a word-aligned address A, Figure 2-2 shows how the word at address A, the
halfword at addresses A and A+2, and the bytes at addresses A, A+1, A+2, and A+3
map on to each other when the core is configured as big-endian.
24 23
Byte at address A+1
Copyright © 1994-2001. All rights reserved.
Figure 2-2 Big-endian addresses of bytes and halfwords within words
Word at address A
16 15
Byte at address A+2
Halfword at address A+2
8 7
Byte at address A+3
Programmer’s Model
0
2-5

Related parts for SAM9RL64