SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 271

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

B.17.2 RANGEOUT signal
ARM DDI 0029G
The address comparator output of the watchpoint is used to drive the write enable for
the CHAINOUT latch. The input to the latch is the output of the data comparator from
the same watchpoint. The output of the latch drives the CHAIN input of the breakpoint
comparator. The address YYY is stored in the breakpoint register and when the CHAIN
input is asserted, the breakpoint address matches and the breakpoint triggers correctly.
The RANGEOUT signal is derived as follows:
The RANGEOUT output of watchpoint register 1 provides the RANGE input to
watchpoint register 0. This RANGE input enables you to couple two breakpoints
together to form range breakpoints.
Selectable ranges are restricted to being powers of 2. For example, if a breakpoint is to
occur when the address is in the first 256 bytes of memory, but not in the first 32 bytes,
program the watchpoint as follows:
For Watchpoint 1:
1.
2.
3.
For Watchpoint 0:
1.
2.
3.
4.
If Watchpoint 0 matches but Watchpoint 1 does not, that is the RANGE input to
Watchpoint 0 is 0, the breakpoint is triggered.
Program Watchpoint 1 with an address value of
of
Clear the ENABLE bit.
Program all other Watchpoint 1 registers as normal for a breakpoint. An address
within the first 32 bytes causes the RANGE output to go HIGH but does not
trigger the breakpoint.
Program Watchpoint 0 with an address value of
of
Set the ENABLE bit.
Program the RANGE bit to match a 0.
Program all other Watchpoint 0 as normal for a breakpoint.
Copyright © 1994-2001. All rights reserved.
.
.
and an address mask
and an address mask
Debug in Depth
B-53