SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 27

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

1.2
1.2.1
1.2.2
ARM DDI 0029G
Architecture
Instruction compression
The Thumb instruction set
The ARM7TDMI processor has two instruction sets:
•
•
The ARM7TDMI processor is an implementation of the ARMv4T architecture. For full
details of both the ARM and Thumb instruction sets refer to the ARM Architecture
Reference Manual.
This section describes:
•
•
Microprocessor architectures traditionally had the same width for instructions, and data.
Therefore 32-bit architectures had higher performance manipulating 32-bit data, and
could address a large address space much more efficiently than 16-bit architectures.
16-bit architectures typically had higher code density than 32-bit architectures, but
approximately half the performance.
Thumb implements a 16-bit instruction set on a 32-bit architecture to provide:
•
•
The Thumb instruction set is a subset of the most commonly used 32-bit ARM
instructions. Thumb instructions are each 16 bits long, and have a corresponding 32-bit
ARM instruction that has the same effect on the processor model. Thumb instructions
operate with the standard ARM register configuration, allowing excellent
interoperability between ARM and Thumb states.
On execution, 16-bit Thumb instructions are transparently decompressed to full 32-bit
ARM instructions in real time, without performance loss.
Thumb has all the advantages of a 32-bit core:
•
•
•
•
the 32-bit ARM instruction set
the 16-bit Thumb instruction set.
Instruction compression on page 1-5
The Thumb instruction set on page 1-5.
higher performance than a 16-bit architecture
higher code density than a 32-bit architecture.
32-bit address space
32-bit registers
32-bit shifter, and Arithmetic Logic Unit (ALU)
32-bit memory transfer.
Copyright © 1994-2001. All rights reserved.
Introduction
1-5