SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 273

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

B.19
ARM DDI 0029G
Programming Restriction
The EmbeddedICE Logic watchpoint units must only be programmed when the clock
to the core is stopped. This can be achieved by putting the core into the debug state.
The reason for this restriction is that if the core continues to run at ECLK rates when
EmbeddedICE Logic is being programmed at TCK rates, it is possible for the
BREAKPT signal to be asserted asynchronously to the core.
This restriction does not apply if MCLK and TCK are driven from the same clock, or
if it is known that the breakpoint or watchpoint condition can only occur some time after
EmbeddedICE Logic has been programmed.
This restriction does not apply in any event to the debug control or status registers.
Note
Copyright © 1994-2001. All rights reserved.
Debug in Depth
B-55