SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 281

• Manufacturer Part Number: SAM9RL64
• Manufacturer: Atmel Corporation

Specifications of SAM9RL64

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 118
• Ext Interrupts: 118
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 5
• Ssc: 2
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 6
• Adc Resolution (bits): 10
• Adc Speed (ksps): 220
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Index
The items in this index are listed in alphabetical order, with symbols and numerics appearing at the end. The
references given are to page numbers.
A
Abort 3-24
Abort Mode 2-7
AC Timing diagrams
ARM DDI 0029G
ABE address control 7-6
ALE address control 7-26
APE address control 7-27
bidirectional data read cycle 7-8
bidirectional data write cycle 7-7
breakpoint timing 7-20
configuration pin timing 7-13
coprocessor timing 7-14
data bus control 7-9
DCC output 7-19
debug timing 7-17
exception timing 7-15
general timings 7-4, 7-5
MCLK 7-22
output 3-state time 7-10
scan general timing 7-23
synchronous interrupt 7-16
TCK and ECLK realtionship 7-21
Copyright © 1994-2001. All rights reserved.
Access times
Accesses
Accessing high registers in Thumb state
Address bits
Address bus
Address timing 3-14
Addressing signals 3-11
Architecture
ARM
ARM-state
unidirectional data read cycle 7-12
unidirectional data write cycle 7-11
units of nanoseconds 7-28
stretching 3-29
byte 3-26
halfword 3-26
reads 3-26
writes 3-27
significant 3-12
configuring 3-14
v4T 2-2
instruction summary 1-12
2-12
B
Bidirectional bus timing 3-18
Bidirectional data bus 3-19
Big-endian 2-4, 2-5
Block diagram 1-7
Breakpoints
Burst types 3-7
Bus cycle types 3-4
addressing modes 1-15
condition fields 1-19
fields 1-18
operand 2 1-18
register orgnaization 2-9
register set 2-8
hardware B-45
programming B-45
software B-46
timing 7-20
clearing B-46
setting B-46
Index-1