ST10F276Z5T3 STMicroelectronics, ST10F276Z5T3 Datasheet - Page 112

MCU 16BIT 832KBIT FLASH 144-TQFP

ST10F276Z5T3

Manufacturer Part Number
ST10F276Z5T3
Description
MCU 16BIT 832KBIT FLASH 144-TQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F276Z5T3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-TQFP, 144-VQFP
Cpu Family
ST10
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C
Total Internal Ram Size
68KB
# I/os (max)
111
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
24-chx10-bit
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Processor Series
ST10F27x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
68 KB
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
497-6399 - KIT DEV STARTER ST10F276Z5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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System reset
112/239
Figure 27. Asynchronous hardware RESET (EA = 0)
1.
2. 2. 3 to 8 TCL depending on clock source selection
Exit from asynchronous reset state
When the RSTIN pin is pulled high, the device restarts: as already mentioned, if internal
FLASH is used, the restarting occurs after the embedded FLASH initialization routine is
completed. The system configuration is latched from Port0: ALE, RD and WR/WRL pins are
driven to their inactive level. The device starts program execution from memory location
00'0000h in code segment 0. This starting location will typically point to the general
initialization routine. Timing of asynchronous Hardware Reset sequence are summarized in
Figure 26
This timing can be longer than Port0 settling time + PLL synchronization (if needed, that is
P0(15:13) changed).
It can longer than 500ns to take into account of Input Filter on
RPD
RSTIN
RSTF
(After Filter)
P0[15:13]
P0[12:2]
P0[1:0]
ALE
RST
and
Figure
27.
not transparent
not transparent
≤ 500 ns
≥ 50 ns
not transparent
transparent
transparent
1)
system start-up configuration
Latching point of Port0 for
≤ 500 ns
≥ 50 ns
RSTIN
3..4 TCL
3..8 TCL
pin.
2)
not t.
not t.
not t.
8 TCL
ST10F276Z5

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