ST10F276Z5T3 STMicroelectronics, ST10F276Z5T3 Datasheet - Page 67

• Manufacturer Part Number: ST10F276Z5T3
• Description: MCU 16BIT 832KBIT FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276Z5T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C
• Total Internal Ram Size: 68KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 24-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 68 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: 497-6399 - KIT DEV STARTER ST10F276Z5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

ST10F276Z5
5.6.4
5.6.5
Note:
ST10 configuration in alternate boot mode
When the ST10F276Z5 enters BSL mode via CAN, the configuration shown in
automatically set (values that deviate from the normal reset values are marked in bold).
Table 36.
1. In Bootstrap modes (standard or alternate) ROMEN, bit 10 of SYSCON, is always set regardless of EA pin
2. BUSCON0 is initialized with 0000h, external bus disabled, if pin EA is high during reset. If pin EA is low
Even if the internal IFLASH is enabled, a code cannot be executed from it.
As the XFlash is needed, XPERCON register is configured by the ABM loader code and bit
XPEN of SYSCON is set. However, as long as the EINIT instruction is not executed (and it is
not in the bootstrap loader code), the settings can be modified. To do this, perform the
following steps:
●
●
The changing of the XPERCON value cannot be executed from the XFlash because the
XFlash is disabled by the clearing of XPEN bit in SYSCON.
Watchdog
As for standard boot, the Watchdog timer remains disabled during Alternate Boot mode. In
case a Watchdog reset occurs, a software reset is generated.
See note from
Watchdog timer
Register SYSCON
Context pointer CP
Register STKUN
Stack pointer SP
Register STKOV
Register BUSCON0
XPERCON
level. BYTDIS, bit 9 of SYSCON, is set according to data bus width selection via Port0 configuration.
during reset, BUSACT0, bit 10, and ALECTL0, bit 9, are set enabling the external bus with lengthened ALE
signal. BTYP field, bit 7 and 6, is set according to Port0 configuration.
Copy in DPRAM a function that will
–
–
–
–
Call the function from XFlash
Function or register
disable the XPeripherals by clearing XPEN in SYSCON register,
enabled the needed XPeripherals by writing the correct value in XPERCON
register,
set XPEN bit in SYSCON,
return to calling address.
ST10 configuration in alternate boot mode
Section 5.2.7
concerning software reset.
Disabled
0404H
FA00
FA00
FA40
FC00
access to startup
configuration
002D
H
H
H
H
H
(1)
Access
(2)
XPEN bit set
XRAM1-2, XFlash, CAN1 enabled
Notes
Bootstrap loader
Table 36
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