ST10F276Z5T3 STMicroelectronics, ST10F276Z5T3 Datasheet - Page 87

• Manufacturer Part Number: ST10F276Z5T3
• Description: MCU 16BIT 832KBIT FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276Z5T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C
• Total Internal Ram Size: 68KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 24-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 68 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: 497-6399 - KIT DEV STARTER ST10F276Z5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

ST10F276Z5
10.2
GPT2
The GPT2 module provides precise event control and time measurement. It includes two
timers (T5, T6) and a capture/reload register (CAPREL). Both timers can be clocked with an
input clock which is derived from the CPU clock via a programmable prescaler or with
external signals. The count direction (up/down) for each timer is programmable by software
or may additionally be altered dynamically by an external signal on a port pin (TxEUD).
Concatenation of the timers is supported via the output toggle latch (T6OTL) of timer T6
which changes its state on each timer overflow/underflow.
The state of this latch may be used to clock timer T5, or it may be output on a port pin
(T6OUT). The overflow / underflow of timer T6 can additionally be used to clock the
CAPCOM timers T0 or T1, and to cause a reload from the CAPREL register. The CAPREL
register may capture the contents of timer T5 based on an external signal transition on the
corresponding port pin (CAPIN), and timer T5 may optionally be cleared after the capture
procedure. This allows absolute time differences to be measured or pulse multiplication to
be performed without software overhead.
The capture trigger (timer T5 to CAPREL) may also be generated upon transitions of GPT1
timer T3 inputs T3IN and/or T3EUD. This is advantageous when T3 operates in Incremental
Interface mode.
Table 49
scaler option at 40 MHz and 64 MHz CPU clock respectively.
Table 49.
Table 50.
Pre-scaler
factor
Input Freq
Resolution
Period
maximum
Pre-scaler
factor
Input Freq
Resolution
Period
maximum
f
f
CPU
CPU
= 64MHz
= 40MHz
and
GPT2 timer input frequencies, resolutions and periods at 40 MHz
GPT2 timer input frequencies, resolutions and periods at 64 MHz
Table 50
6.55 ms 13.1 ms 26.2 ms
10 MHz
16 MHz
62.5 ns
100 ns
4.1 ms
000b
000b
4
4
list the timer input frequencies, resolution and periods for each pre-
125 ns
200 ns
8.2 ms
5 MHz
8 MHz
001b
001b
8
8
2.5 MHz
16.4 ms
400 ns
250 ns
4 MHz
010b
010b
16
16
Timer Input Selection T5I / T6I
Timer Input Selection T5I / T6I
52.4 ms
32.8 ms
2 MHz
0.8 µs
0.5 µs
011b
011b
MHz
1.25
32
32
625 kHz
104.8 m
65.5 ms
1.0 µs
1.6 µs
1 kHz
100b
100b
64
64
s
General purpose timer unit
500 kHz
209.7 m
3.2 µs
2.0 µs
312.5
131.1
101b
101b
128
kHz
128
ms
s
419.4 ms 838.9 ms
262.1 ms 524.3 ms
250 kHz
156.25
6.4 µs
4.0 µs
110b
110b
256
kHz
256
128 kHz
12.8 µs
78.125
8.0 µs
111b
111b
512
kHz
512
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