ST10F276Z5T3 STMicroelectronics, ST10F276Z5T3 Datasheet - Page 231

• Manufacturer Part Number: ST10F276Z5T3
• Description: MCU 16BIT 832KBIT FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276Z5T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C
• Total Internal Ram Size: 68KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 24-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 68 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: 497-6399 - KIT DEV STARTER ST10F276Z5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

ST10F276Z5
24.1.2
24.1.3
Concurrent transmission requests in DAR-mode (C-CAN module)
Description
When the C-CAN module is configured to operate in DAR mode (Disable Automatic
Retransmission) and the host requests the transmission of several messages at the same
time, only two of these messages are transmitted. For all other message transmission
requests the TxRqst bits are reset, no transmission is started, and NewDat and IntPnd are
kept unchanged. For the two messages which are transmitted, the TxRqst and NewDat bits
are reset and IntPnd is set if if it has been enabled by TxIE. TxRqst, NewDat and IntPnd are
bits of the message interface control registers.
The normal operation mode (DAR = 0) is not affected by this phenomenon.
Workaround
The DAR mode is intended to support time-triggered operation (TTCAN level 1) supporting
the transmission of a message only in its dedicated time window. It is an error to request the
transmission of several messages at the same time, and no workarounds should
consequently be necessary for TTCAN applications.
The progress of a requested transmission can be monitored by checking the message
object TxRqst and NewDat [optionally IntPnd] bits. In DAR mode, when a message
transmission has failed either because the transmission was disturbed or because it has not
started, it is necessary to request the message transmission again.
For details on DAR mode and message control registers, refer to user manual UM0409.
Disabling the transmission requests (C-CAN module)
Description
If the host disables the pending transmission request of the lowest-priority message
(number 32 by default) in the short time window during which the message handler state
machine prepares the transmission, but before the transmission has actually started, then
this transmission request may remain disabled. It remains in this state even if the host
immediately re-enables it.
The status of the message object transmission request bit does not show that the
transmission is disabled. This only happens when the message object is the only one with a
pending transmission request.
If the transmission request is blocked in the disabled state, it will be re-enabled by the first
activity detected on the CAN bus or by setting the transmission request of any other
message object.
The other message objects are not affected by this phenomenon.
Workaround
It is usually not necessary to disable the transmission request of a message object. If the
message object is to be used for another message, it is sufficient to prepare the new content
corresponding to this message in the CPU interface register (Identifier, DLC, Data, with
TxRqst and NewDat [optionally TxIE] bits) and to transfer it into the message object. The
new content is then transmitted at the next opportunity, and is not altered by a possibly
ongoing transmission of the previous content of the same message object.
Known limitations
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