ST10F276Z5T3 STMicroelectronics, ST10F276Z5T3 Datasheet - Page 170

• Manufacturer Part Number: ST10F276Z5T3
• Description: MCU 16BIT 832KBIT FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276Z5T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C
• Total Internal Ram Size: 68KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 24-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 68 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: 497-6399 - KIT DEV STARTER ST10F276Z5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Register set
170/239
Table 79.
BUSCON0 (FF0Ch / 86h)
BUSCON1 (FF14h / 8Ah)
BUSCON2 (FF16h / 8Bh)
BUSCON3 (FF18h / 8Ch)
CSWEN0 CSREN0 RDYPOL0 RDYEN0
CSWEN1 CSREN1 RDYPOL1 RDYEN1
CSWEN2 CSREN2 RDYPOL2 RDYEN2
CSWEN3 CSREN3 RDYPOL3 RDYEN3
WRCFG
CLKEN
BYTDIS
ROMEN
SGTDIS
ROMS1
STKSZ
RW
RW
RW
RW
15
15
15
15
Bit
RW
RW
RW
RW
14
14
14
14
SYSCON description (continued)
RW
13
13
13
13
Write configuration control (inverted copy of WRC bit of RP0H)
‘0’: Pins WR and BHE retain their normal function.
‘1’: Pin WR acts as WRL, pin BHE acts as WRH.
System clock output enable (CLKOUT)
‘0’: CLKOUT disabled, pin may be used for general purpose I/O.
‘1’: CLKOUT enabled, pin outputs the system clock signal or a prescaled value of
system clock according to XCLKOUTDIV register setting.
Disable/enable control for pin BHE (set according to data bus width)
‘0’: Pin BHE enabled.
‘1’: Pin BHE disabled, pin may be used for general purpose I/O.
Internal memory enable (set according to pin EA during reset)
‘0’: Internal memory disabled: Accesses to the IFlash Memory area use the
external bus.
‘1’: Internal memory enabled.
Segmentation disable/enable control
‘0’: Segmentation enabled (CSP is saved/restored during interrupt entry/exit).
‘1’: Segmentation disabled (Only IP is saved/restored).
Internal memory mapping
‘0’: Internal memory area mapped to segment 0 (00’0000h...00’7FFFh).
‘1’: Internal memory area mapped to segment 1 (01’0000h...01’7FFFh).
System stack size
Selects the size of the system stack (in the internal I-RAM) from 32 to 1024 words.
RW
RW
RW
RW
12
12
12
12
11
11
11
11
-
-
-
-
BUSACT0 ALECTL0
BUSACT1 ALECTL1
BUSACT2 ALECTL2
BUSACT3 ALECTL3
RW
RW
RW
RW
10
10
10
10
RW
RW
RW
RW
9
9
9
9
SFR
SFR
SFR
SFR
Function
8
8
8
8
-
-
-
-
7
7
7
7
BTYP
BTYP
BTYP
BTYP
RW
RW
RW
RW
6
6
6
6
MTTC0 RWDC0
MTTC1 RWDC1
MTTC2 RWDC2
MTTC3 RWDC3
RW
RW
RW
RW
5
5
5
5
RW
RW
RW
RW
Reset value: 0000h
Reset value: 0000h
Reset value: 0000h
Reset value: 0xx0h
4
4
4
4
ST10F276Z5
3 2 1 0
3 2 1 0
3 2 1 0
3 2 1 0
MCTC
MCTC
MCTC
MCTC
RW
RW
RW
RW