ST10F276Z5T3 STMicroelectronics, ST10F276Z5T3 Datasheet - Page 62

MCU 16BIT 832KBIT FLASH 144-TQFP

ST10F276Z5T3

Manufacturer Part Number
ST10F276Z5T3
Description
MCU 16BIT 832KBIT FLASH 144-TQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F276Z5T3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
68K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-TQFP, 144-VQFP
Cpu Family
ST10
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C
Total Internal Ram Size
68KB
# I/os (max)
111
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
24-chx10-bit
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Processor Series
ST10F27x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
68 KB
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
497-6399 - KIT DEV STARTER ST10F276Z5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Bootstrap loader
62/239
Error induced by the polling
The code used for the polling is the following:
CAN
bit
Therefore the maximum error at the detection of the communication on CAN pin is:
The error at the detection for the 5
In the worst case, the induced error is 6 CPU clock cycles, so the polling could induce an
error of 6 timer ticks.
Error induced by the baud rate calculation
The content of the timer PT0 counter corresponds to 29 bit times, resulting in the following
equation:
where BRP, Tseg1 and Tseg2 are the field of the CAN Bit Timing register.
The CAN protocol specification recommends to implement a bit time composed of at least 8
time quanta (tq). This recommendation is applied here. Moreover, the maximum bit time
length is 25 tq. To ensure precision, the aim is to have the smallest Bit Rate Prescaler (BRP)
and the maximum number of tq in a bit time.
This gives the following ranges for PT0 according to BRP:
WaitCom:
....
CAN_Boot:
WaitDominantBit:
WaitRecessiveBit:
(1 not taken + 1 taken jumps) + 1 taken jump + 1 bit set: (6) + 6 CPU clock cycles
(1 taken jump) + 1 not taken jump + 1 compare + 1 bit clear: (4) + 6 CPU cycles
JNB P4.5,CAN_Boot
JB
BSET T6R
BSET PWMCON0.0
JMPR cc_UC,WaitRecessiveBit
JB
JNB P4.5,WaitRecessiveBit; wait for 1st dominant bit = Stuff
CMPI1R1,#5
JMPR cc_NE,WaitDominantBit; No, go back to count more
BCLR PWMCON.0
P3.11,WaitCom
P4.5,WaitDominantBit; wait for end of stuff bit
PT0 = 58 x (BRP + 1) X (1 + Tseg1 + Tseg2)
464 x (1 + BRP) ≤ PT0 ≤ 1450 x (1 + BRP)
8 ≤ 1 + Tseg1 + Tseg2 ≤ 25
th
recessive bit is:
; if SOF detected on CAN, then go to
; loader
; Wait for start bit at RxD0
; Start Timer T6
; Start PWM Timer0
; Test if 5th stuff bit detected
; Stop timer
; here the 5th stuff bit is detected:
; PT0 = 29 Bit_Time (25D and 4R)
; (resolution is 1 CPU clk cycle)
ST10F276Z5

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