ST10F276Z5T3 STMicroelectronics, ST10F276Z5T3 Datasheet - Page 222

• Manufacturer Part Number: ST10F276Z5T3
• Description: MCU 16BIT 832KBIT FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276Z5T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C
• Total Internal Ram Size: 68KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 24-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 68 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: 497-6399 - KIT DEV STARTER ST10F276Z5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Electrical characteristics
23.8.21
222/239
External bus arbitration
V
Table 109. External bus arbitration
Figure 66. External bus arbitration (releasing the bus)
1. The device completes the currently running bus cycle before granting bus access.
2. This is the first possibility for BREQ to become active.
3. The CS outputs will be resistive high (pull-up) after t
t
t
t
t
t
t
t
61
62
63
64
65
66
67
DD
Symbol
SR
CC
CC
CC
CC
CC
CC
= 5 V ±10%,
CLKOUT
HOLD
HLDA
BREQ
CSx
(P6.x)
Others
HOLD input setup time
to CLKOUT
CLKOUT to HLDA high
or BREQ low delay
CLKOUT to HLDA low
or BREQ high delay
CSx release
CSx drive
Other signals release
Other signals drive
V
SS
Parameter
= 0 V
1
t
61
, T
A
= -40 to +125 °C,
1
(1)
1)
Min.
18.5
F
– 4
– 4
TCL = 12.5 ns
–
–
CPU
64
.
= 40 MHz
C
t
66
t
63
L
= 50 pF
Max.
12.5
20
15
20
15
–
t
t
62
64
3)
2)
1/2 TCL = 1 to 64 MHz
Variable CPU Clock
Min.
18.5
– 4
– 4
–
–
Max.
12.5
ST10F276Z5
20
15
20
15
–
ns