ST10F276Z5T3 STMicroelectronics, ST10F276Z5T3 Datasheet - Page 139

• Manufacturer Part Number: ST10F276Z5T3
• Description: MCU 16BIT 832KBIT FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F276Z5T3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 832KB (832K x 8)
• Program Memory Type: FLASH
• Ram Size: 68K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C
• Total Internal Ram Size: 68KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 24-chx10-bit
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Processor Series: ST10F27x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 68 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: 497-6399 - KIT DEV STARTER ST10F276Z5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

ST10F276Z5
22.2
General purpose registers (GPRs)
The GPRs form the register bank that the CPU works with. This register bank may be
located anywhere within the internal RAM via the Context Pointer (CP). Due to the
addressing mechanism, GPR banks reside only within the internal RAM. All GPRs are bit-
addressable.
Table 66.
The first 8 GPRs (R7...R0) may also be accessed bytewise. Other than with SFRs, writing to
a GPR byte does not affect the other byte of the respective GPR. The respective halves of
the byte-accessible registers have special names:
Table 67.
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
RL0
RH0
RL1
RH1
RL2
RH2
Name
Name
General purpose registers (GPRs)
General purpose registers (GPRs) bytewise addressing
(CP) + 0
(CP) + 1
(CP) + 2
(CP) + 3
(CP) + 4
(CP) + 5
Physical
address
(CP) + 0
(CP) + 2
(CP) + 4
(CP) + 6
(CP) + 8
(CP) + 10
(CP) + 12
(CP) + 14
(CP) + 16
(CP) + 18
(CP) + 20
(CP) + 22
(CP) + 24
(CP) + 26
(CP) + 28
(CP) + 30
Physical
address
F0h
F1h
F2h
F3h
F4h
F5h
address
8-bit
F0h
F1h
F2h
F3h
F4h
F5h
F6h
F7h
F8h
F9h
FAh
FBh
FCh
FDh
FEh
FFh
8-bit
addr
ess
CPU general purpose (byte) register RL0
CPU general purpose (byte) register RH0
CPU general purpose (byte) register RL1
CPU general purpose (byte) register RH1
CPU general purpose (byte) register RL2
CPU general purpose (byte) register RH2
CPU general purpose (word) register R0
CPU general purpose (word) register R1
CPU general purpose (word) register R2
CPU general purpose (word) register R3
CPU general purpose (word) register R4
CPU general purpose (word) register R5
CPU general purpose (word) register R6
CPU general purpose (word) register R7
CPU general purpose (word) register R8
CPU general purpose (word) register R9
CPU general purpose (word) register R10
CPU general purpose (word) register R11
CPU general purpose (word) register R12
CPU general purpose (word) register R13
CPU general purpose (word) register R14
CPU general purpose (word) register R15
Description
Description
Register set
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
UUUUh
Reset
value
Reset
value
UUh
UUh
UUh
UUh
UUh
UUh
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