HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 130

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 7 User Break Controller (UBC)
7.5.3
If a user break is set for the fetch of a particular instruction, and exception handling with higher
priority than a user break is in contention and is accepted in the decode stage for that instruction
(or the next instruction), user break exception handling may not be performed after completion of
the higher-priority exception handling routine (on return by RTE).
7.5.4
When a branch instruction with no delay slot (including exception handling) jumps to the jump
destination instruction on execution of the branch, a user break will not be generated even if a user
break condition has been set for the first jump destination instruction fetch.
Rev. 5.00 Jan 06, 2006 page 108 of 818
REJ09B0273-0500
Contention between User Break and Exception Handling
Break at Non-Delay Branch Instruction Jump Destination

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