HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 584

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 18 ROM (128 kB Version)
18.8.2
Software protection can be implemented by setting erase block register 1 (EBR1) and the RAMS
bit in the RAM emulation register (RAMER). When software protection is in effect, setting the P
or E bit in flash memory control register 1 (FLMCR1) does not cause a transition to program
mode or erase mode. (See table 18.8.)
Table 18.8 Software Protection
Item
SWE pin protection
Block specification
protection
Emulation protection
Rev. 5.00 Jan 06, 2006 page 562 of 818
REJ09B0273-0500
Software Protection
Description
Clearing the SWE bit to 0 in FLMCR1 sets
the program/erase-protected state for all
blocks.
(Execute in on-chip RAM or external
memory.)
Erase protection can be set for individual
blocks by settings in erase block register 1
(EBR1).
Setting EBR1 to H'00 places all blocks in
the erase-protected state.
Setting the RAMS bit to 1 in the RAM
emulation register (RAMER) places all
blocks in the program/erase-protected
state.
Program
Yes
Yes
Functions
Erase
Yes
Yes
Yes

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