HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 256

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 10 Advanced Timer Unit (ATU)
Bit 2—ICR0D Input Trigger (TRG0D): Selects whether a pin (TIOD) or the channel 1
compare-match signal (TRG1A) is to be used as the channel 0 input capture register (ICR0D)
input trigger.
Bit 2:
TRG0D
0
1
Bit 1—Reserved: This bit is always read as 0, and should only be written with 0.
Bit 0—ICR0A Input Trigger (TRG0A): Selects whether a pin (TIOA) or the channel 1
compare-match signal (TRG1A) is to be used as the channel 0 input capture register (ICR0A)
input trigger.
Bit 0:
TRG0A
0
1
Rev. 5.00 Jan 06, 2006 page 234 of 818
REJ09B0273-0500
Description
Input pin (TIOD) used as input trigger
Channel 1 compare-match signal (TRG1A) used as input trigger
Description
Input pin (TIOA) used as input trigger
Channel 1 compare-match signal (TRG1A) used as input trigger
(Initial value)
(Initial value)

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