HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 59

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Classification Types
Logic
operations
Shift
Branch
6
10
9
Operation
Code
AND
NOT
OR
TAS
TST
XOR
ROTL
ROTR
ROTCL
ROTCR
SHAL
SHAR
SHLL
SHLLn
SHLR
SHLRn
BF
BT
BRA
BRAF
BSR
BSRF
JMP
JSR
RTS
Function
Logical AND
Bit inversion
Logical OR
Memory test and bit set
Logical AND and T bit set
Exclusive OR
One-bit left rotation
One-bit right rotation
One-bit left rotation with T bit
One-bit right rotation with T bit
One-bit arithmetic left shift
One-bit arithmetic right shift
One-bit logical left shift
n-bit logical left shift
One-bit logical right shift
n-bit logical right shift
Conditional branch, conditional branch with
delay (Branch when T = 0)
Conditional branch, conditional branch with
delay (Branch when T = 1)
Unconditional branch
Unconditional branch
Branch to subroutine procedure
Branch to subroutine procedure
Unconditional branch
Branch to subroutine procedure
Return from subroutine procedure
Rev. 5.00 Jan 06, 2006 page 37 of 818
REJ09B0273-0500
Section 2 CPU
No. of
Instructions
14
14
11

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