HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 152

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 8 Bus State Controller (BSC)
8.4.2
Simplification of Bus Cycle Start Detection
For consecutive accesses of the same CS space, waits are inserted so that the number of idle cycles
designated by the CW3 to CW0 bits of the BCR2 occur. However, for write cycles after reads, the
number of idle cycles inserted will be the larger of the two values defined by the IW and CW bits.
When idle cycles already exist between access cycles, waits are not inserted. Figure 8.8 shows an
example. A continuous access idle is specified for CSn space, and CSn space is consecutively
write accessed.
T
T
T
T
T
1
2
1
2
idle
CK
Address
CSn
RD
WRx
Data
CSn space access
Idle cycle
CSn space access
Figure 8.8 Same Space Consecutive Access Idle Cycle Insertion Example
Rev. 5.00 Jan 06, 2006 page 130 of 818
REJ09B0273-0500