HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 70

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 2 CPU
Instruction
STS.L MACH,@–Rn
STS.L MACL,@–Rn
STS.L PR,@–Rn
TRAPA #imm
Note:
2.5
2.5.1
The CPU has five processing states: reset, exception processing, bus release, program execution
and power-down. Figure 2.6 shows the transitions between the states.
Rev. 5.00 Jan 06, 2006 page 48 of 818
REJ09B0273-0500
* The number of execution cycles before the chip enters sleep mode: The execution
Processing States
State Transitions
cycles shown in the table are minimums. The actual number of cycles may be
increased when (1) contention occurs between instruction fetches and data access, or
(2) when the destination register of the load instruction (memory
register used by the next instruction are the same.
Instruction Code
0100nnnn00000010
0100nnnn00010010
0100nnnn00100010
11000011iiiiiiii
Operation
Rn–4
Rn–4
Rn–4
PC/SR
PC
Rn, MACH
Rn, MACL
Rn, PR
stack area, (imm)
(Rn)
(Rn)
(Rn)
register) and the
Exec.
Cycles
1
1
1
8
T Bit

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