HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 541

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
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Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Table 17.2 Port A Data Register (PADR) Read/Write Operations
17.3
Port B is an input/output port with the 12 pins shown in figure 17.2.
PAIOR
0
1
Port B
Port B
Pin Function
General input
Other than general
input
General output
Other than general
output
with ROM disabled
A21 (output)
A20 (output)
A19 (output)
A18 (output)
A17 (output)
A16 (output)
PB5 (input/output)/TCLKB (input)
PB4 (input/output)/TCLKA (input)
PB3 (input/output)/TO9 (output)
PB2 (input/output)/TO8 (output)
PB1 (input/output)/TO7 (output)
PB0 (input/output)/TO6 (output)
Expanded mode
Read
Pin state
Pin state
PADR value
PADR value
Figure 17.2 Port B
PB10 (input/output)/A20 (output)
PB9 (input/output)/A19 (output)
PB8 (input/output)/A18 (output)
PB7 (input/output)/A17 (output)
PB6 (input/output)/A16 (output)
PB11 (input/output)/
A21 (output)/POD (input)
with ROM enabled
Expanded mode
Write
Value is written to PADR, but does not affect
pin state
Value is written to PADR, but does not affect
pin state
Write value is output from pin (POD pin = high)
High impedance regardless of PADR value
(POD pin = low)
Value is written to PADR, but does not affect
pin state
Rev. 5.00 Jan 06, 2006 page 519 of 818
Section 17 I/O Ports (I/O)
PB10 (input/output)
PB9 (input/output)
PB8 (input/output)
PB7 (input/output)
PB6 (input/output)
PB11 (input/output)/
POD (input)
Single-chip mode
REJ09B0273-0500

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