HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 77

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
4.1.2
The pins relating to the clock pulse generator are shown in table 4.1.
Table 4.1
4.2
The clock operating mode is set with the MD3 and MD2 pins.
Clock mode selection is possible in operating modes 0 to 3 and 16 to 19. In this case, do not set
both the MD3 and MD2 pin to 1. In programmer mode, the clock operating mode cannot be
changed.
The relationship between the mode pins and the clock operating mode is shown in table 4.2.
Table 4.2
Note: Crystal resonator and external clock input
For the chip operating frequency, a frequency of 1, 2, or 4 times the input frequency can be
selected as the internal clock by means of the on-chip PLL circuit. The system clock (CK pin)
output frequency is the same as that of the internal clock.
Pin Name
External clock
Crystal
System clock
Mode setting
Mode setting
PLL power supply
PLL ground
PLL capacitance
Clock Mode
Mode 0
Mode 1
Mode 2
Pin Configuration
Clock Operating Modes
CPG Pins
Clock Operating Mode Settings
MD3
0
0
1
Abbreviation
EXTAL
XTAL
CK
MD3
MD2
PLLV
PLLV
PLLCAP
CC
SS
MD2
0
1
0
Input
Frequency
Range (MHz)
4–10
4–10
4–5
I/O
Input
Input
Output
Input
Input
Input
Input
Input
Description
Crystal resonator or external clock input
Crystal resonator connection
System clock output
Sets PLL multiplication mode
Sets PLL multiplication mode
PLL multiplier circuit power supply
PLL multiplier circuit ground
PLL multiplier circuit oscillation external
capacitance pin
Section 4 Clock Pulse Generator (CPG)
Rev. 5.00 Jan 06, 2006 page 55 of 818
PLL
Multiplication
Factor
1
2
4
Operating
Frequency Range
(MHz)
4–10
8–20
16–20
REJ09B0273-0500

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