HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 52

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 2 CPU
Addressing
Mode
Indirect register
addressing with
displacement
Indirect indexed
register
addressing
Indirect GBR
addressing with
displacement
Rev. 5.00 Jan 06, 2006 page 30 of 818
REJ09B0273-0500
Instruction
Format
@(disp:4,
Rn)
@(R0, Rn) The effective address is the Rn value plus R0.
@(disp:8,
GBR)
Effective Addresses Calculation
The effective address is Rn plus a 4-bit
displacement (disp). The value of disp is zero-
extended, and remains the same for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation.
The effective address is the GBR value plus an
8-bit displacement (disp). The value of disp is zero-
extended, and remains the same for a byte opera-
tion, is doubled for a word operation, and is
quadrupled for a longword operation.
(zero-extended)
(zero-extended)
1/2/4
Rn
R0
GBR
1/2/4
disp
disp
Rn
+
+
+
Rn + disp
+ disp
Rn + R0
GBR
1/2/4
1/2/4
Equation
Byte: Rn +
disp
Word: Rn +
disp
Longword: Rn
+ disp
Rn + R0
Byte: GBR +
disp
Word: GBR +
disp
Longword:
GBR + disp
4
2
2
4

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