HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 814

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Appendix A On-Chip Supporting Module Registers
Timer Control/Status Register (TCSR)
Note:
Bit
7
6
5
2–0
Note:
Rev. 5.00 Jan 06, 2006 page 792 of 818
REJ09B0273-0500
Initial value:
* To prevent TCSR from being modified easily, the write method differs from that used for
* The overflow interval listed is the time from when the TCNT begins counting at H'00
Bit name:
Bit Name
Overflow flag (OVF)
Timer mode select
(WT/IT)
Timer enable (TME)
Clock select 2 to 0
(CKS2 to CKS0)
general registers. For details, see section 12.2.4, Register Access.
until an overflow occurs.
R/W:
Bit:
R/(W) *
OVF
7
0
WT/IT
R/W
6
0
Value
0
1
0
1
0
1
0
1
0
1
0
1
TME
R/W
5
0
0
1
0
1
0
1
0
1
Interval timer mode: Interval timer interrupt (ITI)
request sent to CPU when TCNT overflows
externally when TCNT overflows
H'FFFF8610
Description
No TCNT overflow in interval timer mode
[Clearing condition]
Read OVF, then write 0 in OVF
TCNT overflow in interval timer mode
Watchdog timer mode: WDTOVF signal output
Timer disabled: TCNT is initialized to H'00 and
halted
Timer enabled: TCNT starts counting
WDTOVF signal or interrupt generated when
TCNT overflows
Clock
/2 (Initial value)
/64
/128
/256
/512
/1024
/4096
/8192
R
4
1
R
3
1
CKS2
R/W
2
0
Overflow Interval *
(When
25.6 µs
819.2 µs
1.6 ms
3.3 ms
6.6 ms
13.1 ms
52.4 ms
104.9 ms
8
CKS1
R/W
(Initial value)
(Initial value)
(Initial value)
1
0
= 20 MHz)
CKS0
R/W
WDT
0
0

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