HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 461
![MCU 5V 256K J-TEMP PB-FREE QFP-1](/photos/28/62/286212/168-bqfp_sml.jpg)
HD64F7051SFJ20V
Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet
1.HD64F7050SFJ20V.pdf
(843 pages)
Specifications of HD64F7051SFJ20V
Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
- Current page: 461 of 843
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The operation of the A/D converter after ADF is set to 1 differs between single mode and scan
mode.
In single mode, after the A/D converter transfers the digit value to ADDR, ADF is set to 1 and the
A/D converter enters the idle state. In scan mode, after all conversions end within one selected
analog group, ADF is set to 1 and conversion is continued. For example, in the case of 12-channel
scanning, ADF is set to 1 immediately after the end of conversion for AN0 to AN3 (group 0)
It is not possible to write 1 to ADF.
Bit 6—A/D Interrupt Enable (ADIE): Enables or disables the A/D interrupt (ADI).
To prevent incorrect operation, ensure that the ADST bit in A/D control register 0 (ADCR0) is
cleared to 0 before switching the operating mode.
When A/D conversion ends and the ADF bit in ADCSR0 is set to 1, an A/D0 A/D interrupt
(ADI0) will be generated If the ADIE bit is 1. ADI0 is cleared by clearing ADF or ADIE to 0.
Bits 5 and 4: A/D Mode 1 and 0 (ADM1, ADM0): These bits select the A/D conversion mode
from single mode, 4-channel scan mode, 8-channel scan mode, and 12-channel scan mode.
To prevent incorrect operation, ensure that the ADST bit in A/D control register 0 (ADCR0) is
cleared to 0 before switching the operating mode.
Bit 6:
ADIE
0
1
Bit 5:
ADM1
0
1
Description
A/D interrupt (ADI0) is disabled
A/D interrupt (ADI0) is enabled
Bit 4:
ADM0
0
1
0
1
Description
Single mode
4-channel scan mode (analog group 0/1/2)
8-channel scan mode (analog groups 0 and 1)
12-channel scan mode (analog groups 0, 1, and 2)
Rev. 5.00 Jan 06, 2006 page 439 of 818
Section 14 A/D Converter
REJ09B0273-0500
(Initial value)
(Initial value)
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