HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 354

MCU 5V 256K J-TEMP PB-FREE QFP-1

HD64F7051SFJ20V

Manufacturer Part Number
HD64F7051SFJ20V
Description
MCU 5V 256K J-TEMP PB-FREE QFP-1
Manufacturer
Renesas Electronics America
Series
SuperH® SH7050r
Datasheet

Specifications of HD64F7051SFJ20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, WDT
Number Of I /o
102
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
168-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS
Quantity:
101
Part Number:
HD64F7051SFJ20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 10 Advanced Timer Unit (ATU)
Contention between TCNT Write and Counter Clearing by Overflow: With channel 3 to 5
free-running counters (TCNT3 to TCNT5), if overflow occurs in the T2 state of a CPU write cycle
when clearing is enabled, the write to TCNT has priority and the counter is not cleared to H'0000.
Writing of 1 to the interrupt status flag (OVF) due to the overflow is performed in the same way as
for normal overflow.
The timing in this case is shown in figure 10.56. In this example, H'5555 is written at the point at
which TCNT overflows.
T1
T2
CK
TCNT input clock
Address
TCNT address
Internal write signal
Overflow signal
5555
TCNT
FFFF
5556
(CPU write value)
Interrupt status flag
(OVF)
Figure 10.56 Contention between TCNT Write and Overflow
Rev. 5.00 Jan 06, 2006 page 332 of 818
REJ09B0273-0500

Related parts for HD64F7051SFJ20V