HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 222

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 Advanced Timer Unit (ATU)
10.1.2
Overall block Diagram ATU Block Diagram: Figure 10.1 shows an overall block diagram of
the ATU.
Rev. 5.00 Jan 06, 2006 page 200 of 818
REJ09B0273-0500
TCLKA
TCLKB
Legend:
TSTR: Timer start register (16 bits)
Interrupts:
ITV0–ITV3, OV10–OV15, IC10A –IC10D, IMI1A–IMI1F, IMI2A, IMI2B, IMI3A–IMI3D,
IMI4A–IMI4D, IMI5A, IMI5B, CMI6–CMI9, OSI10A–OSI10H
External pins:
TIA0–TID0, TIOA1–TIOF1, TIOA2, TIOIB2, TIOA3–TIOD3, TIOA4–TIOD3, TIOA5, TIOB5,
TO6–TO9, TOA10–TOH10
Inter-module connection signals:
Signals to A/D converter, signals to direct memory access controller (DMAC),
signals to advanced pulse controller (APC)
Block Diagrams
Figure 10.1 Overall Block Diagram of ATU
Module data bus
IC/OC control
. . . . . . . .
Counter and register control,
and comparator
I/O interrupt
control
Inter-module
data bus
Interrupts
Inter-module
connection
signals
External pins
Inter-module
address bus