HD64F7051SFJ20V Renesas Electronics America, HD64F7051SFJ20V Datasheet - Page 61

• Manufacturer Part Number: HD64F7051SFJ20V
• Description: MCU 5V 256K J-TEMP PB-FREE QFP-1
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7050r

Specifications of HD64F7051SFJ20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, WDT
• Number Of I /o: 102
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 168-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 2.11 Instruction Code Format
Notes: 1. Depending on the operand size, displacement is scaled 1, 2, or 4. For details, see
Item
Instruction
Instruction
code
Operation
Execution
cycles
T bit
2. Instruction execution cycles: The execution cycles shown in the table are minimums.
the SH-1/SH-2/SH-DSP Software Manual.
The actual number of cycles may be increased when (1) contention occurs between
instruction fetches and data access, or (2) when the destination register of the load
instruction (memory
same.
Format
OP.Sz SRC,DEST
MSB
(xx)
M/Q/T
&
|
^
~
<<n
>>n
—
—
,
LSB
register) and the register used by the next instruction are the
Explanation
OP:
Sz:
SRC:
DEST: Destination
Rm:
Rn:
imm:
disp:
mmmm: Source register
nnnn:
iiii:
dddd:
Direction of transfer
Memory operand
Flag bits in the SR
Logical AND of each bit
Logical OR of each bit
Exclusive OR of each bit
Logical NOT of each bit
n-bit left shift
n-bit right shift
Value when no wait states are inserted *
Value of T bit after instruction is executed. An em-dash (—)
in the column means no change.
Operation code
Size (B: byte, W: word, or L: longword)
Source
Source register
Destination register
Immediate data
Displacement *
Destination register
0000: R0
0001: R1
1111: R15
Immediate data
Displacement
.
.
.
Rev. 5.00 Jan 06, 2006 page 39 of 818
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Section 2 CPU