mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 100

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1
Resets, Interrupts, and General System Control
5.9.9
This high-page register contains bits to configure MCU specific features on the MCF51AC256 series
devices.
5-18
TPMCCFG
COPCLKS
This bit can be written onlyonce after reset. Additional writes are ignored.
Reset:
PPDACK
SPI2FE
SPI1FE
ACIC2
PPDC
Field
Field
2
0
7
6
5
4
3
W
R
COPCLKS
System Options 2 (SOPT2) Register
Partial Power Down Acknowledge — Writing a 1 to PPDACK clears the PPDF bit.
Partial Power Down Control — The write-once PPDC bit controls whether stop2 or stop3 mode is selected.
0 Stop3 mode enabled.
1 Stop2, partial power down, mode enabled.
COP Watchdog Clock Select — This write-once bit selects the clock source of the COP watchdog.
0 Internal 1 kHz LPO clock is source to COP.
1 Bus clock is source to COP.
SPI2 Ports Input Filter Enable — This bit enables the input filter on the SPI2 port pins.
0 Input filter disabled (allows for higher maximum baud rate).
1 Input filter enabled (eliminates noise and restricts maximum baud rate).
SPI1 Ports Input Filter Enable — This bit enables the input filter on the SPI1 port pins.
0 Input filter disabled (allows for higher maximum baud rate).
1 Input filter enabled (eliminates noise and restricts maximum baud rate).
Analog Comparator 2 to Input Capture Enable— This bit connects the output of ACMP2 to TPM3 input
channel 0. See
more details on this feature.
0 ACMP2 output not connected to TPM3 input channel 0.
1 ACMP2 output connected to TPM3 input channel 0.
TPM Clock Configuration — Configures the timer/pulse-width modulator clock signal.
0 TPMCLK is available to FTM1, FTM2, and TPM3 via the IRQ pin; FTM1CLK and FTM2CLK are not available.
1 FTM1CLK, FTM2CLK, and TPMCLK are available to FTM1, FTM2, and TPM3 respectively.
1
7
1
Figure 5-10. System Integration Module Options Register 2 (SOPT2)
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
= Unimplemented or Reserved
Table 5-13. SPMSC2 Register Field Descriptions (continued)
SPI2FE
Chapter 8, “Analog Comparator
0
6
Table 5-14. SOPT2 Register Field Descriptions
SPI1FE
0
5
ACIC2
0
4
(ACMPV3),” and
Description
Description
TPMCCFG
3
1
Chapter 21, “Timer/PWM Module
ACIC1
0
2
Freescale Semiconductor
0
1
ADHWTS
(TPMV3),” for
0
0

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