mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 102

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Resets, Interrupts, and General System Control
5.9.11
This high-page register contains control bits to enable or disable the bus clock to the CRC, FLASH, IRQ,
KBI, ACMP, RTI, and SPIx modules. Gating off the clocks to unused peripherals is used to reduce the
microcontroller’s run and wait currents. See
5-20
Reset:
Field
Field
SCI2
SCI1
CAN
CRC
KBIx
FLS
IRQ
IIC
3
2
1
0
7
6
5
4
W
R
System Clock Gating Control 2 Register (SCGC2)
CRC
CAN Clock Gate Control — This bit controls the clock gate to the CAN module.
0 Bus clock to the CAN module is disabled.
1 Bus clock to the CAN module is enabled.
IIC Clock Gate Control — This bit controls the clock gate to the IIC module.
0 Bus clock to the IIC module is disabled.
1 Bus clock to the IIC module is enabled.
SCI2 Clock Gate Control — This bit controls the clock gate to the SCI2 module.
0 Bus clock to the SCI2 module is disabled.
1 Bus clock to the SCI2 module is enabled.
SCI1 Clock Gate Control — This bit controls the clock gate to the SCI1 module.
0 Bus clock to the SCI1 module is disabled.
1 Bus clock to the SCI1 module is enabled.
CRC Clock Gate Control — This bit controls the clock gate to the CRC module.
0 Bus clock to the CRC module is disabled.
1 Bus clock to the CRC module is enabled.
FTSR Clock Gate Control — This bit controls the bus clock gate to the flash registers. This bit does not affect
normal program execution from the flash array. Only the clock to the flash control registers is affected.
0 Bus clock to flash registers is disabled.
1 Bus clock to flash registers is enabled.
IRQ Clock Gate Control — This bit controls the bus clock gate to the IRQ module.
0 Bus clock to the IRQ module is disabled.
1 Bus clock to the IRQ module is enabled.
KBI Clock Gate Control — This bit controls the clock gate to both of the KBI modules.
0 Bus clock to the KBI modules is disabled.
1 Bus clock to the KBI modules is enabled.
1
7
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Figure 5-12. System Clock Gating Control 2 Register (SCGC2)
Table 5-15. SCGC1 Register Field Descriptions (continued)
FLS
1
6
Table 5-16. SCGC2 Register Field Descriptions
IRQ
1
5
Section 5.8, “Peripheral Clock Gating,”
KBIx
1
4
Description
Description
ACMPx
3
1
RTI
1
2
for more information.
Freescale Semiconductor
SPI2
1
1
SPI1
1
0

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