mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 549

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

The hardware handshake protocol is enabled by the ACK_ENABLE command and disabled by the
ACK_DISABLE command. It also allows for pod devices to choose between the hardware handshake
protocol or the software protocol that monitors the XCSR status byte. The ACK_ENABLE and
ACK_DISABLE commands are:
The default state of the protocol, after reset, is hardware handshake protocol disabled.
The commands that do not require CPU execution, or that have the status register included in the retrieved
bit stream, do not perform the hardware handshake protocol. Therefore, the target does not respond with
an ACK pulse for those commands even if the hardware protocol is enabled. Conversely, only commands
that require CPU execution and do not include the status byte perform the hardware handshake protocol.
See the third column in
An exception is the ACK_ENABLE command, which does not require CPU execution but responds with
the ACK pulse. This feature can be used by the host to evaluate if the target supports the hardware
handshake protocol. If an ACK pulse is issued in response to this command, the host knows that the target
supports the hardware handshake protocol. If the target does not support the hardware handshake protocol
the ACK pulse is not issued. In this case, the ACK_ENABLE command is ignored by the target, because
it is not recognized as a valid command.
Freescale Semiconductor
(TARGET MCU)
DRIVES SYNC
•
•
TARGET MCU
TO BKGD PIN
BDC CLOCK
DRIVES TO
BKGD PIN
BKGD PIN
ACK_ENABLE — Enables the hardware handshake protocol. The target issues the ACK pulse
when a CPU command is executed. The ACK_ENABLE command itself also has the ACK pulse
as a response.
ACK_DISABLE — Disables the ACK pulse protocol. In this case, the host should verify the state
of XCSR[CSTAT] to evaluate if there are pending commands and to check if the CPU’s operating
state has changed to or from active background mode via XCSR[31–30].
HOST
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Table 22-25
Figure 22-24. ACK Pulse and SYNC Request Conflict
HOST SYNC REQUEST PULSE
ACK PULSE
16 CYCLES
for the complete enumeration of this function.
HOST AND TARGET
DRIVE TO BKGD PIN
AT LEAST 128 CYCLES
ELECTRICAL CONFLICT
HIGH-IMPEDANCE
Version 1 ColdFire Debug (CF1_DEBUG)
SPEEDUP PULSE
22-57