mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 360

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Freescale’s Controller Area Network (MSCANV1)
15.5.5.2
The WAIT instruction puts the MCU in a low power consumption stand-by mode. If the CSWAI bit is set,
additional power can be saved in power down mode because the CPU clocks are stopped. After leaving
this power down mode, the MSCAN restarts its internal controllers and enters normal mode again.
While the CPU is in wait mode, the MSCAN can be operated in normal mode and generate interrupts
(registers can be accessed via background debug mode). The MSCAN can also operate in any of the
low-power modes depending on the values of the SLPRQ/SLPAK and CSWAI bits as seen in
15.5.5.3
The STOP instruction puts the MCU in a low power consumption stand-by mode. In stop1 or stop2 modes,
the MSCAN is set in power down mode regardless of the value of the SLPRQ/SLPAK. In stop3 mode,
power down or sleep modes are determined by the SLPRQ/SLPAK values set prior to entering stop3.
CSWAI bit has no function in any of the stop
15.5.5.4
The CPU can request the MSCAN to enter this low power mode by asserting the SLPRQ bit in the
CANCTL0 register. The time when the MSCAN enters sleep mode depends on a fixed synchronization
delay and its current activity:
15-44
If there are one or more message buffers scheduled for transmission (TXEx = 0), the MSCAN will
continue to transmit until all transmit message buffers are empty (TXEx = 1, transmitted
successfully or aborted) and then goes into sleep mode.
If the MSCAN is receiving, it continues to receive and goes into sleep mode as soon as the CAN
bus next becomes idle.
If the MSCAN is neither transmitting nor receiving, it immediately goes into sleep mode.
Operation in Wait Mode
Operation in Stop Mode
MSCAN Sleep Mode
Bus Clock Domain
CPU
Sleep Request
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
SLPAK
Flag
Figure 15-43. Sleep Request / Acknowledge Cycle
SLPRQ
sync.
SLPAK
modes.Table
SYNC
SYNC
CAN Clock Domain
15-36.
sync.
SLPRQ
SLPAK
MSCAN
in Sleep Mode
SLPRQ
Flag
Freescale Semiconductor
Table
15-36.

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