mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 267

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

11.4.17 Features Priority
Figure 11-79
outputs.
11.4.18 Match Trigger
The match triggers are generated if (FTMEN = 1) and (one or more channels were selected by the
CHjTRIG bit where j = 2, 3, 4, 5, 6 or 7). The CHjTRIG bit defines if the channel (j) match (that is, FTM
counter = FTMxC(j)VH:L) generates the match trigger.
The match trigger is an output signal to provide a trigger for other modules.
One or more FTM channels can be selected to generate multiple match triggers in one PWM period (as
shown in
The width of a match trigger is a system clock period.
Freescale Semiconductor
in Output Compare, EPWM,
Output modes logic
CPWM, Combine and/or
Complementary modes)
(generation of channels
(n) and (n+1) output
Figure
shows the priority of the features that can be combined to generate channel (n) and (n+1)
Initialization is only available when (FTMEN = 1) and (COMBINE = 1) and
(CPWMS = 0). Initialization with (FTMEN = 0) or (COMBINE = 0) or
(CPWMS = 1) is not recommended and its results are not guaranteed.
11-80).
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Deadtime
insertion
Figure 11-79. FTM features priority
Initialization
NOTE
control
Fault
Output
mask
control
Polarity
FlexTimer Module (FTMV1)
channel (n) output
channel (n+1) output
11-67