mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 384

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Multipurpose Clock Generator (MCGV3)
frequency can be equal to the maximum frequency the chip-level timing specifications will support (see
the
Device Overview
chapter).
If EREFSTEN and ERCLKEN bits are both set or the MCG is in FEE, FBE, PEE, PBE or BLPE mode,
the external reference clock will keep running during stop mode in order to provide a fast recovery upon
exiting stop.
If CME bit is written to 1, the clock monitor is enabled. If the external reference falls below a certain
frequency (f
or f
depending on the RANGE bit in the MCGC2), the MCU will reset. The
loc_high
loc_low
LOC bit in the System Reset Status (SRS) register will be set to indicate the error.
16.4.8
Fixed Frequency Clock
The MCG presents the divided reference clock as MCGFFCLK for use as an additional clock source. The
MCGFFCLK frequency must be no more than 1/4 of the MCGOUT frequency to be valid. When
MCGFFCLK is valid then MCGFFCLKVALID is set to 1. When MCGFFCLK is not valid then
MCGFFCLKVALID is set to 0.
This clock is intended for use in systems which include a USB interface. It allows the MCG to supply a
48MHz clock to the USB. This same clock can be used to derive MCGOUT. Alternately, MCGOUT can
be derived from either internal or external reference clock. This allows the CPU to run at a lower frequency
(to conserve power) while the USB continues to monitor traffic.
Note that the FLL can not be used for generation of the system clocks while the PLL is supplying
MCGPLLSCLK.
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
16-16
Freescale Semiconductor

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