mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 215

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

If FTMEN = 0, then this write coherency mechanism may be manually reset by writing to the FTMxCnSC
register (whether BDM mode is active or not). This latching mechanism allows coherent 16-bit writes in
either big-endian or little-endian order which is friendly to various compiler implementations.
When BDM is active, the write coherency mechanism is frozen such that the buffer latches remain in the
state they were in when the BDM became active even if one or both halves of the channel value register
are written while BDM is active. Any write to the FTMxCnVH and FTMxCnVL registers bypasses the
buffer latches and writes directly to the register while BDM is active. The values written to the channel
value registers while BDM is active are used in output modes operation once normal execution resumes.
Writes to the channel value registers while BDM is active do not interfere with the partial completion of a
coherency sequence. After the write coherency mechanism has been fully exercised, the channel value
registers are updated using the buffered values written (while BDM was not active) by the user.
11.3.8
The read/write FTM counter initial value registers contain the initial value for the FTM counter.
Writing to either byte (FTMxCNTINH or FTMxCNTINL) latches the value into a buffer and the
FTMxCNTINH:FTMxCNTINL registers are updated when the second byte is written.
When BDM is active, the write coherency mechanism is frozen such that the buffer latches remain in the
state they were in when the BDM became active, even if one or both halves of the counter initial value
register are written while BDM is active. Any write to the counter initial value registers bypasses the buffer
latches and writes directly to the counter initial value register while BDM is active.
The first time that the FTM clock is selected (first write to change the CLKS[1:0] bits to a non-zero value),
FTM counter will start with the value 0x0000. To avoid this behavior, before the first write to select the
FTM clock, write the new value to the FTM counter initial value registers
(FTMxCNTINH:FTMxCNTINL) and then initialize the FTM counter (write a value to FTMxCNTH or
FTMxCNTL).
Freescale Semiconductor
Reset
Reset
W
W
R
R
Bit 15
Bit 7
FTM Counter Initial Value Registers (FTMxCNTINH:FTMxCNTINL)
0
0
7
7
Figure 11-10. FTM Counter Initial Value Register High (FTMxCNTINH)
Figure 11-11. FTM Counter Initial Value Register Low (FTMxCNTINL)
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
14
0
6
0
6
6
13
5
0
5
5
0
12
0
4
0
4
4
11
0
3
0
3
3
10
0
2
0
2
2
FlexTimer Module (FTMV1)
1
9
0
1
1
0
Bit 8
Bit 0
0
0
0
0
11-15