mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 98

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1
2
Resets, Interrupts, and General System Control
5.9.7
This high-page register contains status and control bits to support the low voltage detection function, and
to enable the bandgap voltage reference for use by the ADC module. To configure the low voltage detect
trip voltage, see
SPMSC1 is not reset when exiting from stop2.
5-16
Bit 1 is a reserved bit that must always be written to 0.
This bit can be written only once after reset. Additional writes are ignored.
Reset:
LVDACK
LVDRE
LVDSE
LVDIE
BGBE
LVDE
Field
LVDF
7
6
5
4
3
2
0
W
R
LVDF
System Power Management Status and Control 1 Register
(SPMSC1)
Low-Voltage Detect Flag — Provided LVDE = 1, this read-only status bit indicates a low-voltage detection event.
Low-Voltage Detect Acknowledge — This write-only bit is used to acknowledge low voltage detection errors
(write 1 to clear LVDF). Reads always return 0.
Low-Voltage Detect Interrupt Enable — This bit enables hardware interrupt requests for LVDF.
0 Hardware interrupt disabled (use polling).
1 Request a hardware interrupt when LVDF = 1.
Low-Voltage Detect Reset Enable — This write-once bit enables LVDF events to generate a hardware reset
(provided LVDE = 1).
0 LVDF does not generate hardware resets.
1 Force a microcontroller reset when LVDF = 1.
Low-Voltage Detect Stop Enable — Provided LVDE = 1, this read/write bit determines whether the low-voltage
detection function operates when the microcontroller is in stop mode.
0 Low-voltage detection disabled during stop mode.
1 Low-voltage detection enabled during stop mode.
Low-Voltage Detect Enable — This write-once bit enables low-voltage detection logic and qualifies the
operation of other bits in this register.
0 LVD logic disabled.
1 LVD logic enabled.
Bandgap Buffer Enable — This bit enables an internal buffer for the bandgap voltage reference for use by the
ADC module on one of its internal channels or as a voltage reference for ACMP module.
0 Bandgap buffer disabled.
1 Bandgap buffer enabled.
Figure 5-8. System Power Management Status and Control 1 Register (SPMSC1)
0
7
Table 5-13
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
LVDACK
0
0
6
for the SPMSC2[LVDV] bit description.
Table 5-12. SPMSC1 Register Field Descriptions
LVDIE
0
5
LVDRE
1
4
2
Description
LVDSE
3
1
2
LVDE
1
2
2
Freescale Semiconductor
1
0
0
1
BGBE
0
0

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