mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 46

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory
Consistent with past ColdFire devices, flash configuration data is located at 0x(00)00_0400. The slave
peripherals section of the memory map is further broken into the following sub-sections:
0x(FF)FF_8000 – 0x(FF)FF_807F
0x(FF)FF_9800 – 0x(FF)FF_98FF
0x(FF)FF_FFC0 – 0x(FF)FF_FFFF
The section of memory at 0x(00)C0_0000 is assigned for use by the ColdFire Rapid GPIO module. See
Table 4-5
the module.
The MCF51AC256 series microcontrollers utilize an 8-bit peripheral bus. The bus bridge from the
ColdFire system bus to the peripheral bus is capable of serializing 16-bit accesses into two 8-bit accesses
and 32-bit access into four 8-bit accesses. This can be used to speed access to properly aligned peripheral
registers.
CPU accesses to those parts of the memory map marked as reserved in
address reset if CPUCR[ARD] = 0 or an address error exception if CPUCR[ARD] = 1.
The lower 32 KB of flash memory and slave peripherals section of the memory map are most efficiently
accessed using the ColdFire absolute short addressing mode. RAM is most efficiently accessed using the
A5-relative addressing mode (address register indirect with displacement mode).
4.2
Peripheral registers in the MCF51AC256 series microcontrollers are divided into two groups:
There is no functional advantage to locating peripherals in the direct-page versus the high-page peripheral
space for an MCF51AC256 series microcontroller. Both sets of registers may be efficiently accessed using
the ColdFire absolute short addressing mode. The areas are differentiated to maintain documentation
compatibility with the MC9S08AC128.
4-2
Direct-page equivalent registers begin at 0x(FF)FF_8000 in the memory map.
High-page equivalent registers begin at 0x(FF)FF_9800 in the memory map.
Register Addresses and Bit Assignments
for the rapid GPIO memory map and
0x(FF)FF_8000
0x(00)C0_0000
Base Address
0x(00)00_0000
0x(00)80_0000
Not all peripheral registers are aligned to take advantage of this feature.
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Table 4-1. CPU Access Type Allowed by Region
Flash
RAM
Rapid GPIO
Peripherals
Region
Direct-page equivalent peripheral regs
High-page equivalent peripheral regs
Interrupt controller
Chapter 17, “Rapid GPIO (RGPIO),”
NOTE
Byte
Word
Read
Long
Figure 4-1
Byte
result in an illegal
Word
Write
Freescale Semiconductor
for further details on
Long

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